Open Access
MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory
July 2022, Article No.: 44, pp 1–24

In recent years, we are witnessing a trend toward in-memory computing for future generations of computers that differs from traditional von-Neumann architecture in which there is a clear distinction between computing and memory units. Considering that ...

Analyzing Security Vulnerabilities Induced by High-level Synthesis
July 2022, Article No.: 47, pp 1–22

High-level synthesis (HLS) is essential to map the high-level language (HLL) description (e.g., in C/C++) of hardware design to the corresponding Register Transfer Level (RTL) to produce hardware-independent design specifications with reduced design ...

NxTF: An API and Compiler for Deep Spiking Neural Networks on Intel Loihi
July 2022, Article No.: 48, pp 1–22

Spiking Neural Networks (SNNs) is a promising paradigm for efficient event-driven processing of spatio-temporally sparse data streams. Spiking Neural Networks (SNNs) have inspired the design of and can take advantage of the emerging class of neuromorphic ...

A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators
July 2022, Article No.: 50, pp 1–25

As modern applications demand an unprecedented level of computational resources, traditional computing system design paradigms are no longer adequate to guarantee significant performance enhancement at an affordable cost. Approximate Computing (AxC) has ...



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